Job Details

Job D

You will be involved in the design and development of high speed interface / high speed serial links (HSL) circuits upto 10 Gbps, PCIe Gen4, USB 3.1 Gen2/Gen1, MPHY, MIPI, IOs & LVDS. You will be responsible for PLLs/DPLLs/ADC design. Knowledge of analog circuit design and intuition is important. You should be able to coordinate the circuit design teams and the logic design teams.

• Ability to lead a team and work towards product delivery.
• Experience of Layout and IC fabrication will be preferable.
• Knowledge of SerDes is preferable.
• Excellent verbal and written communication skills.
• Working knowledge in the technology nodes of 65, 45, 28nm is preferred.
• The job function demands for the deep understanding on the protocols like USB, PCIE, MIPI, JEDEC, I2C, SPI etc.